An electronic counter is a device in electronics that has various applications. Some of the counters have single function while some have multi-function. All these counters are preprogrammed with their designated functions. The basic function of electronic counters is to count the pulses which are fed to it. They have the ability to display the information in digital numbers which is fed to them. From timers to digital analogues, these electronic counters have wide applications (Holdsworth, 2002). An electronic counter is a solitary or multi work units gadget used to determine a particular rate or time. A solitary capacity electronic counter is either bidirectional or single directional while other pre customized counters are intended to play out various capacities. As the name recommend, a solitary directional electronic counter check just "Up" or "Down", though bidirectional electronic counters tallies both of "Up" and "Down". These counters are increasingly costly and convoluted in establishment when contrasted with mechanical counters. There are numerous kinds of electronic counters as follow (Zungeru, 2012).

Counters have modes. The ‘mod’ of the counter represents the number of states of the cycles through it, before setting the counter to its initial state. For example, a binary mod 8 counter has 8 countable states. They are from 000 to 111. So, the mod 8 counter counts from 0 to 7. A binary mod 4 counter has 4 count states, from 000 to 011. So, the mod 4 counter counts from 0 to 4. This means, in general a mod N counter can contain n number of flip flops, where 2n = N (Holdsworth, 2002).

Synchronous counter comprises of equal game plan of flip-flops wherein all the flip-flops are checked at the same time and in synchronization with the clock heartbeats. This is the explanation proliferation delay is free of the quantity of flip-flounders in the Synchronous counters. These counters are furnished with combinational rationale circuit too, to guarantee each flip-flop flips at the ideal time.

In synchronous counters, yield of one flip-flop is given to contribution of another flip-flop. Asynchronous comprises of a fell plan of flip-flops wherein clock beat of one flip-flop is driven by the yield of its ancestor flip-flop. The quantity of flip-flops utilized decide the modulus of the counter, wherein the quantity of flip-flops rely on the quantity of rationale states in the counter, before it arrives at its underlying state. The clock input is given to the principal flip-flop. For a Modulo n counter, the clock contribution to the nth flip-flop is controlled by the (n-1)th flip-flop yield. Since clock of one flip-flop relies upon the yield of the past flip-flop, it would change its state after a specific time postpone which rises to the proliferation deferrals of both the flip-flops. For a Modulus n counter, the nth flip-failure will change its state after a deferral of n times the proliferation postponement of one flip-flop.

Background of Overview of Electronic Counters with Their Applications and Limitations

Electronic counters have been present since ages. There are various applications of electronic like frequency counters, digital counters, analogs to digital converters and many other applications like these. There are many potential applications like counters present in buses, hospitals, schools etc. All of these applications use the basic concepts of electronic counters which involve the common electronic circuits of synchronous and asynchronous pathways. The counter is a digital device and the counter output contains predetermined conditions based on the clock pulse application. The count output can be used to count the number of pulses. Counters generally include seesaw settings, which can be synchronous counters or asynchronous counters. In the synchronous counter, only one hour I / O is generated per flip-flop, while in the asynchronous counter, the flip-O / P clock signal is given for neighboring hours. Microcontroller applications must count external events, e.g. accurate internal delay frequency and pulse repetition frequency.

This event is common in digital systems and computers. Software developers can run both events, but the software cycle for counting does not provide definitive results. Important functions are no longer fulfilled. These problems can be solved with a timer and counter on the microcontroller that is used as a circuit interrupts. An electronic counter is a type of device used for various functions (Kumar, A. A. 2016). This counter is a simple or multifunctional unit whose time or speed can be determined. Several types of electronic counters are programmed and used to perform more than one function. In addition, electronic meters have directional or directional functions. As the name suggests, the number of electronic addresses goes up or down, while the bilateral electronic counters count up and down. According to the specifications, this counter is described as durable, strong, compact and easy to use. These meters are generally more expensive and difficult to install than mechanical meters.

Statement of Problem of Overview of Electronic Counters with Their Applications and Limitations

While electronic counters have become a part of daily lives and we use many applications of them in our daily life functions. There is a need to have one comprehensive study about the overview and working of electronic counter, circuits involved behind their working, their current existing applications with pathways behind them, potential developments in in this subject and limitations. So, in this study all these aspects about electronic counters will be explored.

Chapter Two

Literature Review of Overview of Electronic Counters with Their Applications and Limitations

Types of counters of Overview of Electronic Counters with Their Applications and Limitations

The counters are divided into two categories: Synchronous counter and Asynchronous counter

Synchronous counter: a counter that uses the clock signal to change a transition is called a "synchronous counter". This means that the simultaneous counter depends on the clock input to change the status value. All flip-flops on the simultaneous counter are triggered by the same clock signal. Features of synchronous counters are; the design is very simple in design. All sandals are connected to each other and operated with the same clock signal. The previous rocker status output determines the current rocker status change. Because all flip-flops work synchronously, the synchronized counter does not have to be adjusted. We need more logical ports to run the counter together. The action is fast.

Asynchronous counters: Counters where the transition switch does not depend on the clock signal input are referred to as "asynchronous counters". In this counter, the first flip-flop is connected to an external clock signal as well as the rest is synchronized with the output status (Q & Q ') of the previous flip-flop. The asynchronous counter is also called a Ripple counters. These are very simple in design (Kumar, A. A. 2016). As its design is simple, they use less number of logic gates to construct an asynchronous counter. Operation of asynchronous counters is very slow compared to synchronous counters.

Counters are distributed based on synchronization. In the case of the asynchronous counter, the first flip-flop is synchronized with an external clock pulse, so that each subsequent flip is synchronized with the previous flip-flop output. With the synchronous counter, the clock input is connected to all flip-flops so that they are synchronized at the same time.

Asynchronous Counters of Overview of Electronic Counters with Their Applications and Limitations

An asynchronous counter is a counter in which the flip-flop within the counter do not change their conditions simultaneously, because they do not have common clock pulse. The different kinds of asynchronous counters are as follows;

2 Bit asynchronous binary counter
3 Bit asynchronous binary counter
4 Bit asynchronous binary counter

The main function of the asynchronous counter is that each flip-flop gets its own clock from other lashes and is therefore independent of the input clock. This means that the performance of each seesaw can change at different times, and that is an asynchronous term. In the asynchronous counter diagram, we see that the output of the first flip-flop becomes the clock input of the second flip-flop and the output of the second flip-flop becomes the clock input of the third flip-flop. For the first flip-flop, the output changes whenever there is a negative transition in the clock input. This means that the output of the first flipflop produces a series of square waves that is half the frequency of the clock input. Since the output of the first flip-flop becomes the clock of the second flip-flop, the output of the second flip-flop is half the frequency of its clock, i.e. the output of the first flip-flop that in turn is half the frequency of the clock input. This behavior, in essence is captured by the binary bit pattern in the counting sequence.

2-Bit Asynchronous Binary Counter of Overview of Electronic Counters with Their Applications and Limitations

Example 1

Figure: two-bit asynchronous counter

The two-bit asynchronous counter appears on the figure. The external clock is only connected to the first flip-flop clock input (FF0). FF0 then changes the pulse status in the clock pulse to each clock pulse, but FF1 only changes if it is activated by the falling side of the Q output. Because of the slope propagation delay, the transmission of clock input pulses and the transition to output Q to FF0 can never occur at the exact same time (Kumar, A. A. 2016). This means that flip flops cannot be activated at the same time, which leads to asynchronous activation.

Please note that for the simplicity, the transitions for Q0, Q1 and CLK are displayed simultaneously in the time diagram above, even though this is an asynchronous computer. There is actually a small delay between the CLK, Q0 and Q1 transitions. In general, all CLEAR inputs are connected so that one pulse can remove all eyelids before counting begins. The clock pulse fed into FF0 is rippled through other counters after propagation delays, like a ripple on water, hence the name Ripple Counter. The 2-bit ripple counter circuit above has four different states, each one corresponding to a count value. Similarly, a counter with n flip- flops can have 2 in n energy states. The number of states in a counter is known as its mod (modulo) number. Thus a 2-bit counter is a mod-4 counter. The Mod-n counter can also be called a n bounding partition. This is because the most significant flip-flop (the flip-flop farthest from the original clock pulse) generates one pulse for each pulse at the most significant (triggered) flip-flop input.). Therefore, the counter above is an example of a counter divided by 4

Figure: Two-bit asynchronous binary counter, timing diagram, binary state sequence

3-Bit Asynchronous Binary Counter

Below is a 3-bit asynchronous binary counter which is out of sync and cycle schedule. It works exactly like the two-bit asynchronous binary counter mentioned earlier, except it has eight provinces because of the third flip-flop.

Figure: Three-bit asynchronous binary counter, timing diagram, binary state sequence

Propagation Delay:

Figure: Propagation Delay in a 3-bit asynchronous binary counter

Asynchronous counters are usually referred to as ripple counters for the following reasons: The pulse effect of the input clock is first "felt" by FFO. FF1 cannot directly achieve this effect because of the operation delay caused by FF0. Slowdown of travel by FF1 is therefore before the activation of FF2. Thus, the "clock pulse effect" is rolled over at the counter, which, due to a delayed delay, takes time to reach the final flip-flop.

Bit Asynchronous Binary Counter

Below is a 4-bit binary that is out of sync and its schedule for one cycle. Works exactly like the asynchronous 2 or 3 bit binary counters mentioned above, except it has 16 provinces because of the fourth flip-flop

Figure: Four-bit asynchronous binary counter, timing diagram

Chapter Three

Introduction

Asynchronous Decade Counters

A common modulus for counters with truncated sequences is ten. A counter with ten states in its sequence is called a decade counter. The circuit below is an implementation of a decade counter. Ten is a common module for concise serial meters. The counter with ten states in its sequence is called a decade counter.

Figure: Asynchronous decade counter, timing diagram

When the counters are counted to ten (1010), all eyelids will be removed. Note that only Q1 and Q3 are used to decode ten bills. This is called partial decoding because no other province (zero to nine) has Q1 and Q3 HIGH at the same time (Kumar, A. A. 2016). The sequence of the decade counter is shown in the table below:

Once the counter counts to ten (1010), all the flip-flops are being cleared. Notice that only Q1 and Q3 are used to decode the count of ten. This is called partial decoding, as none of the other states (zero to nine) have both Q1 and Q3 HIGH at the same time.

The sequence of the decade counter is shown in the table below: Note that there is an error in Q1 wave. This error is because Q1 must be HIGH before it can decode the number ten. The decode port output only becomes a few nanoseconds after reaching tens (both inputs are HIGH). Therefore, the counter is in position 1010 shortly before resetting to 0000, which leads to a technical error in Q1 and an error generated in the CLR line resetting the counter.

Example: Modulus Twelve Asynchronous Counter

An Asynchronous counter can be implemented having a modulus of 12 with a straight binary sequence from 0000 through 1011

Figure: Asynchronous modulus-12 counter & timing diagram.

Asynchronous Up-Down Counters of Overview of Electronic Counters with Their Applications and Limitations

In some applications, the calculator must be able to count up and down. The circuit below is a 3-bit top-down counter Depending on the status of the UP and DOWN control signals, counting up or down. If the UP input is 1 and the DOWN input is 0, the NAND network between FF0 and FF1 sets the non-inverting output (Q) of FF0 at the FF1 clock input. Likewise, Q is activated by FF1 over other NAND networks on the FF2 clock input. So the calculation is important.

Figure: 3-bit up-down counter

If the input controls UP 0 and DOWN are 1, the reverse output FF0 and FF1 is activated on the FF1 and FF2 clock inputs. When the lashes are initially reset to 0, the counter will roll up the next sequence when the input pulse is placed.

Note that the asynchronous ascending and descending counters are slower than the ascending or descending counters because of the additional propagation delay introduced by the NAND network.

Commercially Available Asynchronous Counters

Example 1:

Figure: The 74LS93A 4-bit asynchronous binary counter logic diagram

Three configurations of the 74LS293 asynchronous counter:

RO (1), R0 (2) are the gated reset inputs. If both of these inputs are HIGH, the counter is reset to the 0000 state by CLR.

Advantages of Asynchronous Counters

The asynchronous counter can easily be designed with a T-flip-flop or D-flip-flop, also known as a ripple counter.
They are used in slow circuits.
They are used as a dividing line between counters n that divide inputs by n, where n is an integer.
The asynchronous counter is also used as a Truncated counters. This can be used to design any mod counter, e.g. even Mod (e.g. Mod 4) or Odd Mod (e.g. Mod 3).

Disadvantages of Asynchronous Counters

Sometimes you just need an additional flip-flop to Re synchronization.
To calculate the order of counter cutting (mod is not the same as 2n), we need further feedback logic.
Counting many bits creates a very large propagation delay for the asynchronous counter.
At high clock frequencies, calculation errors can occur due to time delays.

Applications of Asynchronous Counters

They are used as frequency dividers divided by "N" counters. They are used for applications with low noise and low emissions.
They are used in the design of ten-year asynchronous counters.
This is also used at the Johnson counter and Johnson counter.
Asynchronous counters are used in Mod N waveforms, namely Mod 3, Mod 4, Mod 8, Mod 14, Mod 10 etc.

Synchronous Counters of Overview of Electronic Counters with Their Applications and Limitations

With the synchronous counter, the clock inputs from all the lashes are connected to each other and activated by input pulses. Therefore, all flip-flops change their condition simultaneously

2-Bit Synchronous Binary Counter of Overview of Electronic Counters with Their Applications and Limitations

Figure: Two-bit synchronous binary counter, timing diagram

Propagation Delay:

3- Bit Synchronous Binary Counter

The following circuit is a 3-bit synchronous counter. Input J and K on FF0 are connected to HIGH. Inputs J and K FF1 are connected to output FF0, and inputs J and K FF2 are connected to output AND gates, which are activated by outputs FF0 and FF1.

Figure: A 3-bit synchronous binary counter

Pay attention to what happens after the 3rd clock pulse. Both outputs of FF0 and FF1 are HIGH. The positive edge of the 4th clock pulse will cause FF2 to change its state due to the AND gate.

Figure 3.3b: Timing diagram

Figure: Binary state sequence

The order of counters of the 3-bit counters is shown in Figure. The main advantage of the simultaneous counter is that there is no cumulative delay because all lashes are activated in parallel (Kumar, A. A. 2016). Therefore, the maximum operating frequency of this counter is significantly higher than the corresponding ripple counter.

4-Bit Synchronous Binary Counter

The first Figure shows a 4-bit synchronous binary counter and the second Figure reveals its timing diagram.

Figure: Four-bit synchronous binary counter, timing diagram

Synchronous Decade Counters

It is similar to an asynchronous decade counter, a synchronous decade counter counts from 0 to 9 then recycles to 0 again. This is done by forcing the 1010 state back to the 0000 state. This so called truncated sequence can be constructed by the following circuit.

Figure: A synchronous BCD decade counter

Figure: States of a BCD decade of Overview of Electronic Counters with Their Applications and Limitations

Figure: Timing diagram for the BCD decade counter (Q0 is the LSB)

From the sequence in the Figure 3.5b, we notice that:

Q0 toggles on each clock pulse.
Q1 changes on the next clock pulse each time Q0=1 and Q3=0.
Q2 changes on the next clock pulse each time Q0=Q1=1.
Q3 changes on the next clock pulse each time Q0=1, Q1=1 and Q2=1 (count 7), or then Q0=1 and Q3=1 (count 9).

Flip-flop 2 (Q2) changes on the next clock pulse each time both Q0=1 and Q1=1. Thus we must have J2 = K2 = Q0Q1 Flip-flop 3 (Q3) changes to the opposite state on the next clock pulse each time Q0=1, Q1=1, and Q2=1 (state 7), or when Q0=1 and Q3=1 (state 9).

Thus we must have J3 = K3 = Q0Q1Q2 + Q0Q3

These characteristics are implemented with the AND/OR logic connected as shown in the logic diagram (Figure 3.5b).

Up-Down Synchronous Counters

A circuit of a 3-bit synchronous up-down counter and a table of its sequence are shown in Figure 3.6. Similar to an asynchronous up-down counter, a synchronous up-down counter also has an up-down control input (Kumar, A. A. 2016). It is used to control the direction of the counter through a certain sequence

A basic 3-bit up/down synchronous counter and its up/down sequence An examination of the sequence table shows:

For both the UP and DOWN sequences, Q0 toggles on each clock pulse.
For the UP sequence, Q1 changes state on the next clock pulse when Q0=1.
For the DOWN sequence, Q1 changes state on the next clock pulse when Q0=0.
For the UP sequence, Q2 changes state on the next clock pulse when Q0=Q1=1.
For the DOWN sequence, Q2 changes state on the next clock pulse when Q0=Q1=0

These characteristics are implemented with the AND, OR & NOT logic connected as shown in the above Figure

Example: 4-bit synchronous up-down counter

Advantages of Synchronous Counters of Overview of Electronic Counters with Their Applications and Limitations

Easy to program
Outcome is known immediately
Error recovery easier (usually)
Better real-time response (usually)

Disadvantages of Synchronous Counters of Overview of Electronic Counters with Their Applications and Limitations

Service must be up and ready.
Requestor blocks, held resources are “tied up”.
Usually requires connection-oriented protocol

Applications of Synchronous Counters

The most common and well-known application of synchronous counters is machine motion control, the process in which the rotary shaft encoders convert the mechanical pulses into electric pulses. These pulses will act as clock input of the up/ down counter and will initiate the circuit motion.

Shift register counters of Overview of Electronic Counters with Their Applications and Limitations

There are two types of shift register counters. Such as ring counter and Johnson Counter

Ring Counter of Overview of Electronic Counters with Their Applications and Limitations

A 4-bit ring counter is made of D-flip flops or JK-flip flop connected in cascade with the non-complemented output of the last stage connected as an input to the first stage. Ring counter has Mod = n ‘n’ is the number of bits. It means 4-bit ring counter has 4 states.

Consider Q1, Q2, Q3, and Q4 as the 4 bits of the ring counter. The truth table for 4-bit ring counter is given below.

Ring counter’s state must be determined before operation. Because the cycle 1 counter is circulating in all phases and there are no external inputs other than the clock signal. Therefore, we must manually set the status to the first 1000 statuses (Kumar, A. A. 2016). We have to configure the flip-flop in the first step and delete the remaining steps to get 1000 status. The standard input pin is designed for this function. The Ring counter schedule is shown below:

Working: First we have to set the initial state to 1000 via standard input.

Whenever the first clock edge hits the counter the outputs of each step to the next step. And the output from the last one goes to the first step and makes the status 0100. Upon next clock cycle, each stage will update its state according to its input. So the ‘1’ will be shifted to the third stage making the state 0010. Upon another clock cycle, the ‘1’ will reach the last stage making the 0001. Now upon next clock cycle, ‘1’ from the last stage (flip-flop) will shift back to the first stage making the initial state 1000. And it starts again from the first state repeating itself considering the clock signal is provided. This is how the data inside the ring counter circulates in the ring. Ring counter divides the frequency of the clock signal by ‘n’. it is the bit size of the ring counter. So ring counter can be used as a frequency divider.

Advantages of Ring Counter of Overview of Electronic Counters with Their Applications and Limitations

It doesn’t need a decoder ( It is a self-decoding circuit)
It can be can be implemented using JK and D flip-flops.

Disadvantages of Ring Counter

In ring counter, only 4 of the 15 states are being utilized.

Methodology of Overview of Electronic Counters with Their Applications and Limitations

For this study, the basic emphasize will be laid upon consulting the existing literature. Secondary research methods will be used to conduct this study. For this purpose, books, articles, technical reports and potential digital development reports from companies will be consulted. In this way the overall comprehensive study would emerge at the end. Counter is a sequential logic circuits used in digital electronics to calculate how often an event or event occurs. A water bank made by various slippers. As we know, flip-flops have clock inputs (Kumar, A. A. 2016). There are two types of counters depending on the type of clock input. Asynchronous and Synchronous counters. Because the counter, like all subsequent circuits, depends on the clock to understand its function, we will consider each clock cycle. That means the changes in the states of some flip flops at every clock interval.

Chapter Four

Implementation and Testing of Overview of Electronic Counters with Their Applications and Limitations

Johnson Counter

The Johnson counter or twisted ring counter is a type of synchronous ring counter in which the complemented output of the flip-flop is connected with the input of the first flip-flop. Johnson counter can be made with D-flip flops or JK-flip flops in cascade setup (Kumar, A. A. 2016). The Mod of Johnson counter is ‘2n’, n is the bit size of the counter. Mod is the maximum number of states a counter can obtain.

Consider a 4-bit Johnson counter with QA, QB, QC, QD as the output of 4 stages of the counter. The truth table of the 4-bit Johnson counter is given below;

The schematic of 4-bit Johnson counter consists of 4 D-flip flops or 4 JK-flip flops. These flip-flops are connected with each other in cascade setup. The output of each flip-flop is connected with the input of the succeeding flip-flop.

The complemented output of the last flip-flop is connected with the input of the first flip-flop. The Same clock input is connected with all flip-flops. There is clear input for resetting the state to default 0000. Johnson counter’s schematic design is given below.

Working of Johnson Counter: The default state of Johnson counter is 0000 thus before starting the clock input we need to clear the counter using clear input.

Whenever a clock edge hits the counter the output of each flip-flop will transfer to the next stage (flip-flop) but the inverted output of the last flip-flop will shift to the first stage making the state 1000. Upon next clock cycle, another ‘1’ will stack in from the left side as the inverted output of the last stage will be shifted to the first stage. On next clock cycle, another ‘1’ will add in from left until the state becomes 1111 (Kumar, A. A. 2016). Now that the last flip-flop’s output is ‘1’, the next clock cycle will shift the invert of the last flip-flop which is ‘0’ into the first flip-flop. It will result in stacking ‘0’ from the left side. This stacking of the first 0 will make the state 1111 into 0111. The next coming clock cycles will stack in 0’s from the left making the states 0011, 0001 & 0000 with each clock cycle. Eventually, it reaches its default state and it starts from the beginning again.

Advantages of Johnson Counter of Overview of Electronic Counters with Their Applications and Limitations

Extra outputs as compared to ring counter.
It has same number of flip flop but it can count twice the number of states the ring counter can count.
It count the data in a continuous loop
It only needs half the number of flip-flops compared to the standard ring counter for the same MOD

Disadvantages of Johnson Counter of Overview of Electronic Counters with Their Applications and Limitations

Only 8 of the 15 states are being used.
It doesn’t count in a binary sequence.

Applications of Ring & Johnson Counters of Overview of Electronic Counters with Their Applications and Limitations

Johnson counter divides a clock signal’s frequency by ‘2n’. n is the bit size of the counter. Johnson counter uses less number of flip-flops compare to a typical ring counter.
2-stage Johnson counter, also known as quadrature oscillator produce 4 outputs with 90-degree phase shift. It can easily drive a 2-phase stepper motor.
3-stage Johnson counter is used as 3-phase square wave generator having 120-degree phase shift between the.

Chapter Five

Conclusion of Overview of Electronic Counters with Their Applications and Limitations

Counters can be either synchronous counters or synchronous counters. The asynchronous counter is also called the ripple counters. Not all FFs change simultaneously in the asynchronous counter. They are serial counters. All FFs change simultaneously in synchronous counters. They are parallel counters. Counters can be either up or down counters or up / down counters. If an ordinary module is a product of an individual module in each cascade counters, someone talks about a complete module cascade. The LSB for every meter is the most changing part. The Mod-M counter and the Mod-N cascade provide the Mod-MN counter. If the clock rate is very high due to the propagation delay accumulated in the state with an asynchronous counter, a state check can occur. The propagation delay for each FF is not recorded in a simultaneous counter. Synchronous counters have the advantage of less serious high-speed decoding problems, but the disadvantage is that they have more circuits than asynchronous counters. The counter suffers from locking issues or is not of an automatic start type if it continues to change from an invalid state to an invalid state after the next hour and never returns to its normal state. Shortened modulus counters can experience locking issues. The counter is the self-starting type when it returns to a valid state and is usually counted after one or more indicator bags, even if it goes into an invalid state. The shift register is quite restrictive because, in our opinion, it cannot move from one country to another. The shift register can be set as a counter or sequence generator. Ring counter also called basic ring counter or a simple ring counter. Twisted ring counter is also called the Johnson counter. A synchronous counter where the output of one counter controls the input of another clock counter is called a hybrid counter. Pulsed sequences can be generated by direct logic or indirect logic or shift registers. In direct logic, output is taken directly from FF, whereas in indirect logic is taken from

References of Overview of Electronic Counters with Their Applications and Limitations

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