0 address instruction example

Chapter 5 A Closer Look at Instruction Set Architectures Chapter 5 Objectives • Understand the factors involved in instruction set architecture design. • Gain familiarity with memory addressing modes. 2 5.1 Introduction • This chapter builds upon the ideas in Chapter 4. • We present a detailed look at different instruction formats, operand types, and memory access methods. • We will see the interrelation between machine organization and instruction formats. • This leads to a deeper understanding of computer architecture in general. • We study the ways in which memory is accessed by various ISAs. 3 5.2 Instruction Formats Instruction sets are differentiated by the following: • Operand storage in the CPU (data can be stored in a stack structure or in register) • Number of explicit operands per instruction (zero, one, two, three being the most common) • Operand location (instructions can be classified as register-toregister, register-to-memory, which simply refer to the combination of operands allowed per instruction) • Types of operations (including not only types of operations but also which instructions can access memory and which cannot) • Type and size of operands (operands can be addresses, numbers, or even characters) 5.2 Instruction Formats Instruction set architectures are measured according to: o The amount of space a program requires o The complexity of the instruction set, in terms of the amount of decoding necessary to execute an instruction, and the complexity of the tasks performed by the instructions o The length of the instructions o The total number of instructions 5.2 Instruction Formats • In designing an instruction set, consideration is given to: o Instruction length. ▪ Whether short, long, or variable. o Number of operands. o Number of addressable registers. o Memory organization. ▪ Whether byte- or word addressable. o Addressing modes. ▪ Choose any or all: direct, indirect or indexed. 6 5.2 Instruction Formats In designing an instruction set, consideration is given to: • o Short instructions are typically better because they take up less space in memory and can be fetched quickly. Short instructions limits the number of instructions . However, this limits the number of instructions, because there must be enough bits in the instruction to specify the number of instructions we need. o Instructions of a fixed length are easier to decode but waste space. o Memory organization affects instruction format. Byte-addressable memory means every byte has a unique address even though words are longer then 1 byte. o A fixed length instruction does not necessarily imply a fixed number of operands. o There are many different types of addressing modes. 5.2 Instruction Formats • An important consideration for architecture design concerns how the CPU will store data. • We have three choices: 1. A stack architecture – (zero address) 2. An accumulator architecture (MARIE Architecture) – (1-Address ISA) 3. A general purpose register architecture – (3-Address ISA (RegisterMemory) and 2-Adress (Load-Store) • In choosing one over the other, the tradeoffs are simplicity (and cost) of hardware design with execution speed and ease of use. 8 5.2 Instruction Formats • In a stack architecture, instructions and operands are implicitly taken from the stack. – A stack cannot be accessed randomly. • In an accumulator architecture, one operand of a binary operation is implicitly in the accumulator. – One operand is in memory, creating lots of bus traffic. • In a general purpose register (GPR) architecture, registers can be used instead of memory. – Faster than accumulator architecture. – Efficient implementation for compilers. – Results in longer instructions. 9 5.2 Instruction Formats - A Stack Architecture • Stack machines use one - and zero-operand instructions. ▪ LOAD and STORE instructions require a single memory address operand. ▪ Other instructions use operands from the stack implicitly.