Difference between word addressable and byte addressable

Addressable Memory Related terms: Operating Systems, Android, Hypervisors, Transistors, Workload, Bit Address Bus, Memory Location View all Topics Architecture David Money Harris, Sarah L. Harris, in Digital Design and Computer Architecture (Second Edition), 2013 Memory If registers were the only storage space for operands, we would be confined to simple programs with no more than 32 variables. However, data can also be stored in memory. When compared to the register file, memory has many data locations, but accessing it takes a longer amount of time. Whereas the register file is small and fast, memory is large and slow. For this reason, commonly used variables are kept in registers. By using a combination of memory and registers, a program can access a large amount of data fairly quickly. As described in Section 5.5, memories are organized as an array of data words. The MIPS architecture uses 32-bit memory addresses and 32-bit data words. MIPS uses a byte-addressable memory. That is, each byte in memory has a unique address. However, for explanation purposes only, we first introduce a word-addressable memory, and afterward describe the MIPS byte-addressable memory. Figure 6.1 shows a memory array that is word-addressable. That is, each 32-bit data word has a unique 32-bit address. Both the 32-bit word address and the 32-bit data value are written in hexadecimal in Figure 6.1. For example, data 0xF2F1AC07 is stored at memory address 1. Hexadecimal constants are written with the prefix 0x. By convention, memory is drawn with low memory addresses toward the bottom and high memory addresses toward the top. Figure 6.1. Word-addressable memory MIPS uses the load word instruction, lw, to read a data word from memory into a register. Code Example 6.6 loads memory word 1 into $s3. The lw instruction specifies the effective address in memory as the sum of a base address and an offset. The base address (written in parentheses in the instruction) is a register. The offset is a constant (written before the parentheses). In Code Example 6.6, the base address is $0, which holds the value 0, and the offset is 1, so the lw instruction reads from memory address ($0 + 1) = 1. After the load word instruction (lw) is executed, $s3 holds the value 0xF2F1AC07, which is the data value stored at memory address 1 in Figure 6.1. Code Example 6.6 Reading Word-Addressable Memory Assembly Code # This assembly code (unlike MIPS) assumes word-addressable memory lw $s3, 1($0) # read memory word 1 into $s3 Code Example 6.7 Writing Word-Addressable Memory Assembly Code # This assembly code (unlike MIPS) assumes word-addressable memory sw $s7, 5($0) # write $s7 to memory word 5 Similarly, MIPS uses the store word instruction, sw, to write a data word from a register into memory. Code Example 6.7 writes the contents of register $s7 into memory word 5. These examples have used $0 as the base address for simplicity, but remember that any register can be used to supply the base address. The previous two code examples have shown a computer architecture with a word-addressable memory. The MIPS memory model, however, is byte-addressable, not word-addressable. Each data byte has a unique address. A 32-bit word consists of four 8-bit bytes. So each word address is a multiple of 4, as shown in Figure 6.2. Again, both the 32-bit word address and the data value are given in hexadecimal. Figure 6.2. Byte-addressable memory Code Example 6.8 shows how to read and write words in the MIPS byte-addressable memory. The word address is four times the word number. The MIPS assembly code reads words 0, 2, and 3 and writes words 1, 8, and 100. The offset can be written in decimal or hexadecimal. The MIPS architecture also provides the lb and sb instructions that load and store single bytes in memory rather than words. They are similar to lw and sw and will be discussed further in Section 6.4.5. Byte-addressable memories are organized in a big-endian or little-endian fashion, as shown in Figure 6.3. In both formats, the most significant byte (MSB) is on the left and the least significant byte (LSB) is on the right. In big-endian machines, bytes are numbered starting with 0 at the big (most significant) end. In little-endian machines, bytes are numbered starting with 0 at the little (least significant) end. Word addresses are the same in both formats and refer to the same four bytes. Only the addresses of bytes within a word differ. Figure 6.3. Big- and little-endian memory addressing Code Example 6.8 Accessing Byte-Addressable Memory MIPS Assembly Code lw $s0, 0($0) # read data word 0 (0xABCDEF78) into $s0 lw $s1, 8($0) # read data word 2 (0x01EE2842) into $s1 lw $s2, OxC($0) # read data word 3 (0x40F30788) into $s2 sw $s3, 4($0) # write $s3 to data word 1 sw $s4, 0x20($0) # write $s4 to data word 8 sw $s5, 400($0) # write $s5 to data word 100 Example 6.2 Big- and Little-Endian Memory Suppose that $s0 initially contains 0x23456789. After the following program is run on a big-endian system,