Loading...

Messages

Proposals

Stuck in your homework and missing deadline? Get urgent help in $10/Page with 24 hours deadline

Get Urgent Writing Help In Your Essays, Assignments, Homeworks, Dissertation, Thesis Or Coursework & Achieve A+ Grades.

Privacy Guaranteed - 100% Plagiarism Free Writing - Free Turnitin Report - Professional And Experienced Writers - 24/7 Online Support

Multisim logic converter

20/12/2020 Client: saad24vbs Deadline: 7 Days

CE212


Lab2


Logic Gates


Instructions:


Please download this document and type in your answers for questions in parts 1, 2, and 3; save this document using the following format: CE212Lab2firstname_lastname.doc.


Introduction


All combinational logic can be reduced to basic AND, OR, and NOT logic operations and the AND gate, OR gate, and inverter that implement them. Understanding the operation of these basic logic gates and recognizing how these combine to create more complex logic are the foundation of digital electronics. This experiment will demonstrate how to analyze the operation of logic gates and verify their operation. In Part 1 of this experiment, you will use Multisim to verify the operation of the AND gate, OR gate, and inverter. In Part 2, you will use the Multisim logic converter to examine the operation of the NAND, NOR, and XOR gates.


Reading


Kleitz, Digital Electronics: A Practical Approach with VHDL, 9th Edition, Chapter 3.


Multisim Circuits


Part 1: Digital_Exp_03_Part_01a, Digital_Exp_03_Part_01b, and Digital_Exp_03_Part_01c.


Part 2: Digital_Exp_03_Part_02a, Digital_Exp_03_Part_02b, and Digital_Exp_03_Part_02c.


Key Objectives


Part 1: Learn how to use switches and probes to verify the operation of the AND gate, OR gate, and inverter.


Part 2: Learn how to use the logic converter to verify the operation of the NAND, NOR, and XOR (exclusive-OR) gates.


Part 1: Basic Logic Gates


3.0 The AND Gate


In this section you will connect components to the AND gate so that you can determine its output for each combination of inputs (i.e., its truth table).


1) Open the file Digital_Exp_03_Part_01a .


2) Select the Place Basic tool from the Component Toolbar.


3) Select “SWITCH” from the Family: window and “SPST” from the Component: list.


4) Left-click to the left and a little above the AND gate to place the switch. Note that Multisim


automatically numbers the reference designator as “J1”.


5) Right-click on J1 and select “Properties” from the right-click menu.


6) Click the down arrow () button to the right of the Key for Switch window and select “A” from the


drop-down list. This will configure the “A” key to open and close the switch.


7) Place another SPST switch to the left and a little below the AND gate. Note that Multisim


automatically numbers the reference designator as “J2”.


8) Right-click on J2 and select “Properties” from the right-click menu.


9) Click the down arrow () button to the right of the Key for Switch window and select “B” from the


drop-down list. This will configure the “B” key to open and close the switch.


10) Connect the right side of J1 to the top input of the AND gate.


11) Connect the right side of J2 to the bottom input of the AND gate. Your circuit should now look like


Figure 3-1.




12) Select the Place Basic tool from the Component Toolbar.


13) Select “RESISTOR” from the Family: window and “1k” from the Component: list.


14) Left-click above and between J1 and the AND gate to place the 1 kΩ resistor. Note that Multisim


automatically numbers the reference designator as “R1”.


15) Right-click on R1 and select “90 clockwise” from the right-click menu. This will rotate the resistor so


that its orientation is vertical.


16) Place and rotate another 1 kΩ resistor to the right of R1. Note that Multisim automatically renumbers the reference designator as “R2”.


17) Connect the bottom of R1 to the wire between J1 and the AND gate.


18) Connect the bottom of R2 to the wire between J2 and the AND gate. Your circuit should now look


something like Figure 3-2.




19) Select the Place Source tool from the Component Toolbar.


20) Select “Power Sources” from the Family: window and “VCC” from the Component: list.


21) Left-click above R1 and R2 to place the source.


22) Select the Place Source tool from the Component Toolbar.


23) Select “Power Sources” from the Family: window and “DGND” from the Component: list.


24) Left-click to the left and below J1 and J2 to place the digital ground.


25) Connect the tops of both R1 and R2 to the VCC source.


26) Connect the left sides of both J1 and J2 to the digital ground.


27) Select the Place Indicator tool from the Component Toolbar.


28) Select “PROBE” from the Family: window and “PROBE_DIG_RED” from the Component: list.


29) Left-click above and to the right of the AND gate to place the probe.


30) Connect the probe to the output of the AND gate. Your circuit should now look like Figure 3-3.




You are now ready to test the circuit. When a switch is closed, its input is pulled down to digital


ground through the switch to a logic “0”. When a switch is open, its input is pulled up to VCC through


the resistor to a logic “1”. When the probe is not lit, the output is LOW, or a logic “0”. When the probe


is lit, the output is HIGH, or a logic “1”.


31) Click the Run switch to start the simulation.


32) Use the “A” and “B” keys to open and close the switches. Record the state of the probe for each


combination of switch settings in the “Output” column of Table 3-1.


33) Stop the simulation.


Table 3-1: AND Gate Truth Table


Switch A


Closed=0


Open=1


Switch B


Closed=0


Open=1


Output


Not Lit=0


Lit=1


0


0


0


1


1


0


1


1


3.1 The OR Gate


In this section you will determine the truth table for the OR gate.


1) Open the file Digital_Exp_03_Part_01b .


2) Use the procedure from Section 3.3 to connect the test circuitry to the OR gate.


3) Use the “A” and “B” keys to open and close the switches. Record the state of the probe for each


combination of switch settings in the “Output” column of Table 3-2.


4) Stop the simulation.


Table 3-2: OR Gate Truth Table


Switch A


Closed=0


Open=1


Switch B


Closed=0


Open=1


Output


Not Lit=0


Lit=1


0


0


0


1


1


0


1


1


3.2 The Inverter


In this section you will determine the truth table for the inverter.


1) Open the file Digital_Exp_03_Part_01c .


2) Use the procedure from Section 3.3 to connect the test circuitry to the inverter. Note that because the inverter has only one input, the test circuit requires only one switch and one resistor. Use the Key for Switch window to configure the “A” key to open and close the switch.


3) Use the “A” key to open and close the switches. Record the state of the probe (0 for not lit and 1 for lit) for each combination of switch settings in the “Output” column of Table 3-3.


4) Stop the simulation.


Table 3-3: Inverter Truth Table


Switch A


Closed=0


Open=1


Output


Not Lit=0


Lit=1


0


1


Write down your observations:


Questions for Part 1


1) Which gate follows the rule “Any 1 gives a 1”?


2) Which gate follows the rule “Any 0 gives a 0”?


3) Explain why the inverter is so-named.


Part 2: Extended Logic Gates


Extended logic gates are similar to basic logic gates in that they implement useful and well-defined logic


functions, but their logic functions can be implemented using basic AND gates, OR gates, and inverters. The most common of these are NAND, NOR, and XOR gates. In this part of the experiment, you will use the Multisim logic converter to determine the truth tables for these gates. The logic converter is not a real laboratory device, although its function can be simulated using real digital instruments and software. Figure 3-4 shows the Logic Converter tool on the Instruments Toolbar. Figure 3-5 shows the minimized and expanded


views of the logic converter.




3.3 The NAND Gate


As its name suggests, the NAND (for “not AND”) gate combines the logic of an AND gate and an inverter.


1) Open the file Digital_Exp_03_Part_02a .


2) Select the Logic Converter tool from the Instruments Toolbar.


3) Left-click above the NAND gate to place the logic converter.


4) Connect the “A” (far left) terminal of the logic converter to the top input of the NAND gate.


5) Connect the “B” (second from far left) terminal of the logic converter to the bottom input of the


NAND gate.


6) Connect the output of the NAND gate to the “Out” (far right) terminal of the logic converter.


7) Double-click on the logic converter to expand it. Your circuit should look like Figure 3-6.




8) Click the top button in the “Conversions” section. This will convert the circuit representation of the


NAND gate to a truth table representation. Note that you do not have to click the “Run” button.


9) Copy the logic converter results into the corresponding columns of Table 3-4. The unlabeled column


at the far right of the logic converter is the output of the NAND gate.


Table 3-4: NAND Gate Truth Table


A


B


Output


0


0


0


1


1


0


1


1


3.4 The NOR Gate


As its name suggests, the NOR (for “not OR”) gate combines the logic of an OR gate and an inverter.


1) Open the file Digital_Exp_03_Part_02b.


2) Use the logic converter to generate the truth table for the NOR gate and copy the results into


Table 3-5.


Table 3-5: Nor Gate Truth Table


A


B


Output


0


0


0


1


1


0


1


1


3.5 The XOR Gate


The exclusive-OR (XOR) gate is similar to the OR gate in that its output is 1 when either input is 1.


1) Open the file Digital_Exp_03_Part_02c.


2) Use the logic converter to generate the truth table for the XOR gate and copy the results into


Table 3-6.


Table 3-6: XOR Gate Truth Table


A


B


Output


0


0


0


1


1


0


1


1


Please write down your Observations:


Questions for Part 2


1) How does the truth table of the NAND gate compare with the truth table of the AND gate?


2) You observe that the output of an unknown 2-input gate is 0 only when the inputs are both 0 or both inputs are 1. What type of logic gate are you observing?


3) What gate follows the rule “Any 1 gives a 0”?


4) An XOR gate is similar to an OR gate in that the output is 1 when either input is 1. How does XOR gate


differ from an OR gate?


CE212


Lab2


Logic Gates


Instructions:


Please download this document and type in your answers for questions in parts 1, 2, and 3; save this


document using


the following format: CE212Lab2


firstname_lastname.doc.


Introduction


All combinational logic can be reduced to basic AND, OR, and NOT logic operations and the AND gate,


OR gate, and inverter that implement them. Understanding the operation of these basic logic gates and


recognizing how


these combine to create more complex logic are the foundation of digital electronics.


This experiment will demonstrate how to analyze the operation of logic gates and verify their operation.


In Part 1 of this experiment, you will use Multisim to verify the


operation of the AND gate, OR gate, and


inverter. In Part 2, you will use the Multisim logic converter to examine the operation of the NAND,


NOR, and XOR gates.


Reading


Kleitz,


Digital Electronics: A Practical Approach with VHDL, 9th Edit


ion


, Chapter


3


.


Multisim Circuits


Part 1:


Digital_Exp_03_Part_01a, Digital_Exp_03_Part_01b, and Digital_Exp_03_Part_01c


.


Part 2:


Digital_Exp_03_Part_02a, Digital_Exp_03_Part_02b, and Digital_Exp_03_Part_02c.


Key Objectives


Part 1: Learn how to use switches and probes to verify the operation of t


he AND gate, OR gate, and


inverter.


Part 2: Learn how to use the logic converter to verify the operation of the NAND, NOR, and XOR


(exclusive


-


OR) gates


.


Part 1: Basic Logic Gates


3.0


The


AND Gate


In this section you will connect components to the AND ga


te so that you can determine its output for


each combination


of inputs (i.e., its truth table).


1) Open the file


Digital_Exp_03_Part_01a


.


2) Select the


Place Basic


tool from the


Component Toolbar


.


3) Select “SWITCH” from the


Family


: window and “SPST” from t


he


Component:


list.


4) Left


-


click to the left and a little above the AND gate to place the switch. Note that Multisim


automatically numbers the reference designator as “J1”.


5) Right


-


click on J


1


and select “Properties” from the right


-


click menu.


6) Click t


he down arrow (


) button to the right of the


Key for Switch


window and select “A” from the


drop


-


down list. This will configure the “A” key to open and close the switch.


CE212


Lab2


Logic Gates


Instructions:


Please download this document and type in your answers for questions in parts 1, 2, and 3; save this


document using the following format: CE212Lab2firstname_lastname.doc.


Introduction


All combinational logic can be reduced to basic AND, OR, and NOT logic operations and the AND gate,


OR gate, and inverter that implement them. Understanding the operation of these basic logic gates and


recognizing how these combine to create more complex logic are the foundation of digital electronics.


This experiment will demonstrate how to analyze the operation of logic gates and verify their operation.


In Part 1 of this experiment, you will use Multisim to verify the operation of the AND gate, OR gate, and


inverter. In Part 2, you will use the Multisim logic converter to examine the operation of the NAND,


NOR, and XOR gates.


Reading


Kleitz, Digital Electronics: A Practical Approach with VHDL, 9th Edition, Chapter 3.


Multisim Circuits


Part 1: Digital_Exp_03_Part_01a, Digital_Exp_03_Part_01b, and Digital_Exp_03_Part_01c.


Part 2: Digital_Exp_03_Part_02a, Digital_Exp_03_Part_02b, and Digital_Exp_03_Part_02c.


Key Objectives


Part 1: Learn how to use switches and probes to verify the operation of the AND gate, OR gate, and


inverter.


Part 2: Learn how to use the logic converter to verify the operation of the NAND, NOR, and XOR


(exclusive-OR) gates.


Part 1: Basic Logic Gates


3.0 The AND Gate


In this section you will connect components to the AND gate so that you can determine its output for


each combination of inputs (i.e., its truth table).


1) Open the file Digital_Exp_03_Part_01a.


2) Select the Place Basic tool from the Component Toolbar.


3) Select “SWITCH” from the Family: window and “SPST” from the Component: list.


4) Left-click to the left and a little above the AND gate to place the switch. Note that Multisim


automatically numbers the reference designator as “J1”.


5) Right-click on J


1


and select “Properties” from the right-click menu.


6) Click the down arrow () button to the right of the Key for Switch window and select “A” from the


drop-down list. This will configure the “A” key to open and close the switch.


Applied Sciences

Architecture and Design

Biology

Business & Finance

Chemistry

Computer Science

Geography

Geology

Education

Engineering

English

Environmental science

Spanish

Government

History

Human Resource Management

Information Systems

Law

Literature

Mathematics

Nursing

Physics

Political Science

Psychology

Reading

Science

Social Science

Home

Blog

Archive

Contact

google+twitterfacebook

Copyright © 2019 HomeworkMarket.com

Homework is Completed By:

Writer Writer Name Amount Client Comments & Rating
Instant Homework Helper

ONLINE

Instant Homework Helper

$36

She helped me in last minute in a very reasonable price. She is a lifesaver, I got A+ grade in my homework, I will surely hire her again for my next assignments, Thumbs Up!

Order & Get This Solution Within 3 Hours in $25/Page

Custom Original Solution And Get A+ Grades

  • 100% Plagiarism Free
  • Proper APA/MLA/Harvard Referencing
  • Delivery in 3 Hours After Placing Order
  • Free Turnitin Report
  • Unlimited Revisions
  • Privacy Guaranteed

Order & Get This Solution Within 6 Hours in $20/Page

Custom Original Solution And Get A+ Grades

  • 100% Plagiarism Free
  • Proper APA/MLA/Harvard Referencing
  • Delivery in 6 Hours After Placing Order
  • Free Turnitin Report
  • Unlimited Revisions
  • Privacy Guaranteed

Order & Get This Solution Within 12 Hours in $15/Page

Custom Original Solution And Get A+ Grades

  • 100% Plagiarism Free
  • Proper APA/MLA/Harvard Referencing
  • Delivery in 12 Hours After Placing Order
  • Free Turnitin Report
  • Unlimited Revisions
  • Privacy Guaranteed

6 writers have sent their proposals to do this homework:

Top Essay Tutor
University Coursework Help
Helping Hand
Writer Writer Name Offer Chat
Top Essay Tutor

ONLINE

Top Essay Tutor

I have more than 12 years of experience in managing online classes, exams, and quizzes on different websites like; Connect, McGraw-Hill, and Blackboard. I always provide a guarantee to my clients for their grades.

$45 Chat With Writer
University Coursework Help

ONLINE

University Coursework Help

Hi dear, I am ready to do your homework in a reasonable price.

$42 Chat With Writer
Helping Hand

ONLINE

Helping Hand

I am an Academic writer with 10 years of experience. As an Academic writer, my aim is to generate unique content without Plagiarism as per the client’s requirements.

$40 Chat With Writer

Let our expert academic writers to help you in achieving a+ grades in your homework, assignment, quiz or exam.

Similar Homework Questions

Organisational behaviour book pdf free - 1z0 067 latest dumps - Section 303.0015 of the nursing peer review law - Terminated end fed vee antenna - Benzene from sodium benzoate - Mays and mccovey are beer brewing companies - Loss of innocence archetype - Alyogyne huegelii blue heeler - +91-8306951337 vashikaran specialist near me IN Guwahati - Tennis elbow exercises mayo clinic - Case 9.1 all indian logistics services answers - Criminal justice the essentials 5th edition pdf free - Educating rita study notes - Mafs 912 g co 3.9 answers - Www usingenglish com handouts - Phet circuit construction kit lab - Iot in structural engineering - Agecroft cemetery & crematorium - Jr and ddw pty ltd - Formal thank you letter - Active maths 1 solutions chapter 1 - Their eyes were watching god ch 19 - Chemical reactions of copper lab answers - Work hard get smart no excuses science worksheet - Quehaceres cotidianos - Siemens ts31 test set manual - Classroom Management - Valspar primer and sealer - A local group claims that the police issue - How much does it cost to publish a book on KDP? - Sectioning in engineering drawing ppt - 11 7 challenge problem accounting - Comparative ratio analysis business studies - Layers of fear lock code cat dog rat - The journey of gilgamesh - Advanced Ergonomics - Which forecasting time frame best identifies seasonal effects - How to write a police incident report - Acceptance angle and numerical aperture - Developing policies and procedures for implementation - The council of nicaea in 325 - 55mm ring size australia - Adjectives that end with ful - Jhs little black amp box manual - Sound foundations dancing bears - Drinking coffee elsewhere doris is coming summary - Electron configuration worksheet w311 - Info Course reflection - English - Triage assessment model crisis intervention - Branches of science worksheet answers - Sly dealings skill in deceiving - Leven swimming pool refurbishment - How did puccini romanticize the verismo style of opera - The power of effective questioning - They cage the animals - Us history 1301 book - Dave and busters fair oaks groupon - A long circular aluminum rod is attached - Z test questions and answers - Duffy's quality caring model - Furniture order form visual basic - Asdefcon strategic materiel handbook - What does ruca mean in spanish - Owner of koi bubble tea - Army Crew Team - A story li young lee summary - Cbc bearings para hills - Stephen gayford prints value - Quiz 4 - What is a purpose statement in research - Brasso metal polish msds australia - Kopophobia is the fear of - Ardex na data sheet - EH week8 P8 - An individual has invested in a stock - Report a problem apple inc - Crab eating fox diet - Spencer's flea market in dover delaware - Extron 60 738 01 - Ethical issues of social networks and anytime anywhere accessibility - College algebra - Pepsico sustainability report 2017 pdf - Https acrobat adobe com us en sign html - Mass of empty 50 ml beaker - University of cumberlands webmail - Caps Discussion W1 - The pinewood furniture company produces - Classroom code of conduct - Paparazzi compliance phone number - George mason mis - 2al 3cuso4 al2 so4 3 3cu - Who owns wet n wild sydney - What is the best case time complexity of insertion sort - 1-4 Project 1 and Project 2 Review - Commbank low fee gold credit card - The boy without a flag summary - Lewis structure and molecular models lab answers - You beat time on my head - Julius caesar act 4